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    5,192 tetris vhdl fpga proiecte găsite, la prețul de USD

    Este un proiect pentru facultate. Termenul este 17 mai 2021. Cerința detaliată a proiectului este în imagine. Mi-ar trebui documentația care să cuprindă cutia neagră a circuitului, descompunerea în Unitate de control și Unitate de Execuție, o listă cu resursele pe care le voi volosi (ex: generator de numere aleatoare), organigrama, implementare in VHDL și o schema logică pentru că prez...

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    Project for Cosmin P. S-a încheiat left

    Salut Cosmin. As nevoie de tine pentru a face o aplicatie android și posibil [conectează-te pentru a consulta linkul URL] să știu ce preț [conectează-te pentru a consulta linkul URL] că e în funcție de câteva criterii.Mă gândeam la o app asemănătoare cu Tetris [conectează-te pentru a consulta linkul URL] să mi dai și tu idei de app care [conectează-te pentru a consulta linkul URL...

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    Project for Somai N. S-a încheiat left

    Salut sunt George si vreau să știu dacă mă poți ajuta cu un proiect pe partea de minat cryptomonezi pe fpga îți las un link ca să te informezi despre ea,dacă poți să faci lucrul ăsta discutăm în particular pt că e posibil să mai am oroiecte de genul ăsta,asta e linkul către ce am eu [conectează-te pentru a consulta linkul URL]

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    fpga/ultra and xilinx wiznet vhdl/verilog

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    Scriere si testare VHDL S-a încheiat left

    Trebuie sa programez o placa Spartan-3 Board sa afiseze o imagine pe un LCD ( 2.4 LCD cu driverul de ILI9341) . Imaginea va fi primita pe seriala de RS-232 si transmisa pe LCD , dupa ce LCD-ul a fost initializat . Pana acum am implementat core-ul de SPI ( protocolul prin care comunica placa cu LCD-ul ) , core-ul de seriala ( la care vine atasat un buffer pt a putea verifica aparitia datelor pe ser...

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    retea neuronala Fpga S-a încheiat left

    Realizarea unei retele neuronale implementata in fpga .Recunoasterea formelor,caracterelor pe o matrice 7*7

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    Am nevoie de un proiect intitulat "algoritmi de conversie cc-ca cu functii walsh", mai specific am nevoie de crearea unui proiect care sa elimine armonicile unui invertor pwm trifazat care controleaza un motor de curent alternativ. initial eu am incercat obtinearea unghiurilor armonicilor pe baza functiilor walsh in matlab si ca mai apoi sa pot implementa algoritmul pe FPGA sau in cazul ...

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    Intr-un proiect VHDL sa se realizeze un simulator de memorie CACHE (cu mai multe politici de scriere si citire) care sa poata fi testat pe FPGA. Pretul si durata proiectului sunt orientative.

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    Se utilizează sistemul de dezvoltare cu FPGA Xilinx Spartan 3 produs de firma Altium și mediul de programare Visual C++ 2010 (pentru aplicația pe PC). Se dorește implementarea unui sistem complet care realizează emularea unui calculator cu memorie CACHE prezentă (interfață între procesor și memoria principală). Analiza propusă se va face pentru memoria cache total asociativă (fully associati...

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    Intr-un proiect VHDL sa se realizeze un simulator de memorie CACHE (cu mai multe politici de scriere si citire) care sa poata fi testat pe FPGA. Pretul si durata proiectului sunt orientative.

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    SECURED PORTABLE ECG MONITOR FOR HIGH SENSITIVE PATIENT DATA PROTECTION USING AES ALGORITHM I need an AES encryption and decryption in C . Then I need to apply in FPGA to encrypt and decrypt an ECG signal data The input data will be an ECG signal ya Advanced Encryption Standard coding in C programming

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    SECURED PORTABLE ECG MONITOR FOR HIGH SENSITIVE PATIENT DATA PROTECTION USING AES ALGORITHM I need an AES encryption and decryption in C . Then I need to apply in FPGA to encrypt and decrypt an ECG signal data The input data will be an ECG signal ya Advanced Encryption Standard coding in C programming

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    This project needs Freelancers for IT - Domain ( from C program, C#, Java, .NET, AI, ML, Python, Data Science , Cybersecurity, Digital Signal Process, MATLAB, VHDL, Mechanical Subjects - CAD, Mechatronics... etc) 1. Should take the interviews virtually, preference having experience in virtual interview. 2. Should be able to take min 8 interviews in a day. 3. We will provide the candidates ...

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    I need help with Timing of clock signals in digital circuits in VHDL. I will share more details in chat.

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    vhdl code work 4 zile left

    I have ready state diagram,i just need to work with someone for the vhdl code

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    Hi Moaaz K., I noticed your profile and would like to offer you my project. We can discuss any details over chat.

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    ASIC desing 3 zile left
    VERIFICAT

    Task 2: a. Analyze the VHDL code given below for a Flip flop and [conectează-te pentru a consulta linkul URL] the nature of all the inputs, [conectează-te pentru a consulta linkul URL] the functional table of the flip flop with values of ‘input’, ‘clk’, ‘set’, ‘reset’, ‘Q’ and ‘Qbar’; and [conectează-te pentru a consulta lin...

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    Hardware control and system (VHDL).I will share more details in chat.

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    Need an expert in assembly and CPU on FPGA

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    Image processing on FPGA using [conectează-te pentru a consulta linkul URL] a image and do threshold operation like this

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    Hi, I have an accelerometer (I2C) and I want to read it and print the output on the terminal through UART. The code must be written in Verilog or SystemVerilog targeting Xilinx FPGAs. It will be tested in a Digilent Cmod A7. Design: I2C Master <-> FSM <-> UART

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    VHDL Expert S-a încheiat left

    VHDL Expert VHDL Expert VHDL Expert

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    SECURED PORTABLE ECG MONITOR FOR HIGH SENSITIVE PATIENT DATA PROTECTION USING AES ALGORITHM I need an AES encryption and decryption in C . Then I need to apply in FPGA to encrypt and decrypt an ECG signal data The input data will be an ECG signal ya Advanced Encryption Standard coding in C programming

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    3 oferte

    I need a working code in Verilog that is able to successfully simulate, synthesize and generate bitstream on Xilinx Vivado for FPGA. The code should be able to implement a Convolutional Neural Network and take as input weights and biases from a pretrained model in Python and then use them to identify the 28x28 pixel test image from a MNIST database. Whatever digit is identified by the code, releva...

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    Develop a polynomial evaluator in VHDL.I will share more details in chat.

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    I need help to Create a skip instruction using VHDL. I will discuss more in chat.

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    vhdl program -- 2 S-a încheiat left

    • Make the Memory Map for the following configuration • 1 microprocessor 16 bits addresses • 1 Eprom (16 bits) and a RAM (16 bits) • 9 sensors described in the attached tables • 3 actuators described attached Indicate the addresses in Hexadecimal for each object • Make the VHDL code for the selection of objects • Draw the diagram (processor and other circuits)

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    Hi! I want to deploy a custom RISC-V processor on FPGA. There are two tasks: 1. Deploy the core to run C codes on it and blink an LED (the core is implemented in Verilog and synthesizable). 2. Boot Linux Kernel (files are ready). I want to deploy the processors on the ZCU102 Zynq MPSoC Board (Zynq UltraScale) FPGA.

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    The task is to improve the existing kernel module or develop its minimal implementation. The kernel module is designed to control PCIe device, Xilinx FPGA board (FPGA code is already developed). FPGA board have 4 digital GPIO's configured as inputs and generate an interrupt on the PCIe bus - MSI interrupt with number 0-3, each number corresponds to one exact GPIO pin. The kernel module must r...

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    Project for Sangita Raj V. S-a încheiat left

    Description Proposing and computer implementation of a heuristic program supporting the process of formal verification of digital circuit models using the constraints programming method. You should propose and implement an algorithm, and then test it on a set of selected hardware models in VHDL, Verilog or SystemC. Required knowledge of modern digital and microprocessor systems, ease of creating a...

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    SECURED PORTABLE ECG MONITOR FOR HIGH SENSITIVE PATIENT DATA PROTECTION USING AES ALGORITHM I need an AES encryption and decryption in C . Then I need to apply in FPGA to encrypt and decrypt an ECG signal data The input data will be an ECG signal ya Advanced Encryption Standard coding in C programming

    $20 (Avg Bid)
    $20 Oferta medie
    1 oferte

    SECURED PORTABLE ECG MONITOR FOR HIGH SENSITIVE PATIENT DATA PROTECTION USING AES ALGORITHM I need an AES encryption and decryption in C . Then I need to apply in FPGA to encrypt and decrypt an ECG signal data The input data will be an ECG signal ya Advanced Encryption Standard coding in C programming

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    Hello, I want to ask if you are able to do something like that. The deadline for this project is friday 7. may at 3 P.M. of CET. It is posible to do this until this date? I'm also sending a task for this project. Please, let me know as quickly as you can if you can do that and for how much. Thank you.

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    Hi, I've the report and coding with further instruction. The freelancer needs to make the video of software simulation Video of State Machine Implantation; FPGA vs Microcontrollers in keil software ( [conectează-te pentru a consulta linkul URL]) Let me knock expert freelancer to get the job.

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    Ether Bitstream software S-a încheiat left

    I am looking for someone who can design FPGA mining bitstreams . I'm looking for someone who can work with me long term . This is a very serious project. Looking for experienced FPGA programmer with Verilog skills that can develop bitstreams for BCU1525 (Xilinx VU9P) deployable on the Minerator shell. Equihash variants and X.. variants (x16r - requires changing two BCUs) would be highest prio...

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    VHDL tutorial S-a încheiat left

    I need someone to help me explain some concepts on VHDL

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    I need the help of someone who could help me propose and implement an algorithm using constraints programming methods that supports formal verification of digital models that can be used on hardware models in c Precisely or VHDl,verilog, e.t.c, and also i will need a report proposal on this to get it approved its quite urgent please, your help would be highly appreciated

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    I need your help to Design a full adder circuit to add octal digits using VHDL.I will provide you more details in chat.

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    VHDL project S-a încheiat left

    This is a VHDL project needing help with understanding/suggestion. Contact me for further discussion.

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    Looking for an experienced fpga engineer to help me get going with Verilog and just basic fpga planning, resource allocation , memory controllers, ip use. Multiple sessions [Removed by Freelancer.com Admin for offsiting - please see Section 13 of our Terms and Conditions] maybe 3 times a week 1 hour per session

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    VHDL , QUARTUS , MODELSIM ALTERA, QUESTASIM, UP DOWN COUNTER , COUNT ZERO COUNTER, CLOCK GENERATOR, RGB CONTROLLER. STATE MACHINE ...

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    VGA interface using VHDL S-a încheiat left

    I want to have a logo in different colors on the VGA monitor.

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    Hi, I have an accelerometer (I2C) and I want to read it and print the output on the terminal through UART. The code must be written in Verilog or SystemVerilog targeting Xilinx FPGAs. It will be tested in a Digilent Cmod A7.

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    6 oferte

    Project on VHDL using Xilinx Vivado. Need some one expertise on Digital Design using Xilinx Vivado.

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    Hi Viktor S., I noticed your profile and would like to offer you my project. We can discuss any details over chat.

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    The system will take in real time images and perform lane detection by running the software on an ARM processor implemented on a Xilinx Zync device. This system will enable future investigations into hardware acceleration of critical components such as the Canny detector in FPGA hardware. The system will be demonstrated on a Xilinx PYNQ [3] APSOC platform. This is the reason for the specification...

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    The project is to come up with a method for a microcomputer compensated crystal oscillator (MCXO) using the internal temperature sensor of a stm32 and a Si5351A with a standard 25mhz crystal, The idea is to use a frequency counter or preferably a PLL to measure the output of a Si5351A (I2C-PROGRAMMABLE ANY-FREQUENCY CMOS CLOCK GENERATOR) at a range of temperatures and store the compensated frequ...

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    VHDL testbench S-a încheiat left

    Need someone who can write vhdl test bench in a short period

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    VHDL quick project -- 3 S-a încheiat left

    A short VHDL circuit for a simple task

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