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    2,000 verilog vhdl fpga proiecte găsite, la prețul de USD
    Aparat de cafea in VHDL S-a încheiat left

    Crearea unui aparat de cafea in VHDL(rulabil in programul Vivado) intr-un limbaj cat mai simplist indeplinind cerintele din documentul atasat.

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    Debuging verilog S-a încheiat left

    Debuging verilog

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    السلام عليكم ورحمة الله وبركاته واسعد الله اوقاتك بكل خير عندي واجب ومحتاج مساعدتك اذا وقتك يسمح. انشاء بروجكت بال verilog بحيث يقرأ محتويات ال ROM ويخرج المحتوى على LEDs

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    Modul de inmultire, folosind sumator si registrii de deplasare

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    Este un proiect pentru facultate. Termenul este 17 mai 2021. Cerința detaliată a proiectului este în imagine. Mi-ar trebui documentația care să cuprindă cutia neagră a circuitului, descompunerea în Unitate de control și Unitate de Execuție, o listă cu resursele pe care le voi volosi (ex: generator de numere aleatoare), organigrama, implementare in VHDL și o schema logică pentru că prezentarea proiectului trebuie făcută în Logisim, în care nu putem folosi decât componente de bază. Trebuie să folosim afișorul cu 7 segmente, butoane și switch-uri. La finalul documentației ar trebui să fie și Justificarea soluției alese, Manual de utilizare și întreținere, dar și Posibilități de dezvoltare ulterioară.

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    Project for Athul B. S-a încheiat left

    Hi Athul B.,verilog help

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    Project for Ankita L. S-a încheiat left

    verilog programming

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    Project for Somai N. S-a încheiat left

    Salut sunt George si vreau să știu dacă mă poți ajuta cu un proiect pe partea de minat cryptomonezi pe fpga îți las un link ca să te informezi despre ea,dacă poți să faci lucrul ăsta discutăm în particular pt că e posibil să mai am oroiecte de genul ăsta,asta e linkul către ce am eu

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    Design Verification S-a încheiat left

    PCle, ethernet , UVM, System Verilog

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    verilog programming S-a încheiat left

    verilog

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    fpga/ultra and xilinx wiznet vhdl/verilog

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    system verilog, uvm, Script system verilog, uvm, Script system verilog, uvm, Script system verilog, uvm, Script

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    system verilog, uvm, Script system verilog, uvm, Script system verilog, uvm, Script system verilog, uvm, Script

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    system verilog, uvm,synopsys expert

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    system verilog, uvm S-a încheiat left

    system verilog, uvm

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    Verilog S-a încheiat left

    Verilog

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    Scriere si testare VHDL S-a încheiat left

    Trebuie sa programez o placa Spartan-3 Board sa afiseze o imagine pe un LCD ( 2.4 LCD cu driverul de ILI9341) . Imaginea va fi primita pe seriala de RS-232 si transmisa pe LCD , dupa ce LCD-ul a fost initializat . Pana acum am implementat core-ul de SPI ( protocolul prin care comunica placa cu LCD-ul ) , core-ul de seriala ( la care vine atasat un buffer pt a putea verifica aparitia datelor pe seriala si a prelua datele) si s-a creat un bloc de control ( in fapt este o masina de stari) care initializeaza LCD-ul (si am putut "desena"(hard-coded) un dreptunghi colorat pe LCD). Ceea ce am nevoie este ca imaginea trimisa pe seriala sa fie afisata pe LCD ( incercari esuate din partea mea ).

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    retea neuronala Fpga S-a încheiat left

    Realizarea unei retele neuronale implementata in fpga .Recunoasterea formelor,caracterelor pe o matrice 7*7

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    Am nevoie de un proiect intitulat "algoritmi de conversie cc-ca cu functii walsh", mai specific am nevoie de crearea unui proiect care sa elimine armonicile unui invertor pwm trifazat care controleaza un motor de curent alternativ. initial eu am incercat obtinearea unghiurilor armonicilor pe baza functiilor walsh in matlab si ca mai apoi sa pot implementa algoritmul pe FPGA sau in cazul mai putin favorabil in labview.

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    Intr-un proiect VHDL sa se realizeze un simulator de memorie CACHE (cu mai multe politici de scriere si citire) care sa poata fi testat pe FPGA. Pretul si durata proiectului sunt orientative.

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    Se utilizează sistemul de dezvoltare cu FPGA Xilinx Spartan 3 produs de firma Altium și mediul de programare Visual C++ 2010 (pentru aplicația pe PC). Se dorește implementarea unui sistem complet care realizează emularea unui calculator cu memorie CACHE prezentă (interfață între procesor și memoria principală). Analiza propusă se va face pentru memoria cache total asociativă (fully associative) atât la preluarea instrucțiunilor cât și a datelor. Emularea sistemului se va face hardware, pe placa cu FPGA iar preluarea rezultatelor se va face prin intermediul portului serial RS232 care comunică cu calculatorul. Pe calculator va rula o aplicație de asemenea proiectată care va prezenta rezultatele. Pretul si durata de realizare sunt orientative!

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    Intr-un proiect VHDL sa se realizeze un simulator de memorie CACHE (cu mai multe politici de scriere si citire) care sa poata fi testat pe FPGA. Pretul si durata proiectului sunt orientative.

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    ...detail-oriented developer to create a Custome PCILeech firmware for SCREAMER PCIE SQUIRREL direct access memory card utilizing the 7 Series FPGA 35t chip. Firmware must emulate a real PCIe device and handle TLP requests. Make sure to use the PCILeech bitstream made for the Squirrel. Firmware must bypass and avoid anti-cheat detection on EAC/BE etc. Responsibilities: - Develop firmware for PCILeech FPGA - Debugging and problem-solving throughout firmware development Skills & Experience: - Strong experience in FPGA programming and firmware development - Excellent debugging and problem-solving skills - Experience with high-speed data transmission - Proficiency with VHDL/Verilog languages The timeline for project completion is flexible, indicating a...

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    For this project, I need a skilled Verilog programmer with FPGA implementation experience. The key task is to encode a 4x4 binary (black and white) image into an 8x8 image using least significant bit replacement. Key Responsibilities: - Implementing a least significant bit replacement algorithm. - Delivering clean and efficient Verilog code. - Ensuring compatibility with FPGA hardware. Required Skills and Experience: - Proficiency in Verilog code - Understanding of LSB replacement - Experience with FPGA implementation - Working knowledge of image processing, specifically with binary images.

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    I'm seeking highly skilled Verilog programmers with a solid understanding of Moore state machines and Structural models. In this project, you will design a moore coffee machine with verilog on vivado Key responsibilities: - Create a Verilog project according to the tasks mentioned in the document. Everyt task must work correctly. Skills and experience required: - Proficient in Verilog programming. - Previous experience with Moore FSMs. - Knowledge in working with input/output functions in Verilog. - Deep understanding and practice with structural models. Experience in creating similar designs will be a significant advantage. This is an excellent opportunity for a programmer expert in creating practical Verilog designs with ease.

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    I am looking for a skilled Verilog coder with experience in advanced digital circuit design and implementation. Tasks will involve designing and implementing complex circuits, specifically those involving CPUs or intricate state machines. Key Responsibilities: - Design and implement advanced digital circuits - Test and debug created designs - Maintain documentation of design process and circuit function Skills & Experience: - Expertise in Verilog coding - Experience with complex digital circuit design and implementation - Familiarity with CPUs and complex state machines - Proficiency in using Xilinx Vivado for running Verilog simulations Please ensure you have this experience before placing a bid on this project.

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    I require an expert who can proficiently implement a digital algorithm using Verilog code. The hardware of choice for this undertaking is an FPGA (Field Programmable Gate Array). The complexity level of the algorithm is simple, encompassing basic mathematical operations. Ideal Skills: - Proficient in Verilog. - Experience with FPGA. - Strong understanding of basic mathematical operations. Responsibilities: - Outline and implement a digital algorithm. - Validate the functional correctness of the design. - Perform final checks and tests ensuring operational efficiency on the FPGA device. I welcome professionals who maintain high standards of performance and have prior experience working on a similar task. Your expertise will largely determine the succe...

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    Completing an intermediate-level circuit simulation is on the top of my agenda, and time is of the essence. Key Requirements: - Generate a simulation circuit using either Verilog or VHDL. - The complexity level should be intermediate, meaning that it should include components such as adders, decoders, and multiplexers. Ideal Candidate: An experienced freelancer with a strong background in circuitry and simulation languages such as Verilog or VHDL. Quick response and comprehension of task requirements are paramount due to the urgency of the project. Remember, the successful completion of this project is deemed urgent. Therefore, a prompt response and start are appreciated.

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    I am looking for an expert in FPGA to develop an advanced video mixer capable of integrating multiple sources of video through an HDMI input. This device will be largely used for performing real-time video mixing with a primary focus on merging several HDMI inputs. The ideal output interface that the mixer should extensively support is the HDMI output. It's essential that you have: - Proven experience in FPGA programming and design. - Knowledge of HDMI protocols and signal processing. - Understanding of video data handling for a range of HDMI inputs. - Experience in delivering HDMI output for video mixers. This project will require an understanding of HDMI input and HDMI output configurations to ensure seamless video mixing. It's critical for this project that...

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    I need a VHDL coding expert capable of creating a code for an Intel FPGA that will allow for audio and video output in analog format. The ideal freelancer will: - Be proficient in VHDL, FPGA programming and signal processing - Have a rich experience with Intel FPGA models - Understanding the intricacies of analog audio and video signals This job will require creating a reliable and effective VHDL code that will deliver high-quality audio and video signals to reflect the input accurately. Please bid if you are confident in your ability to deliver this project.

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    I'm in need of an individual skilled in Verilog who can help me achieve a specific task. - Task: Your main responsibility would be writing Verilog code for a simple module implementation. This does not involve complex system level code designs or CPU architecture. - Objective: The primary objective of the module is to model a specific digital logic circuit. The project does not require interaction with other modules or utilization of specific hardware components. The ideal candidate would possess: - Solid experience in Verilog coding, - Expertise in digital circuits, - Strong understanding of digital logic circuits, - A meticulous approach to ensure accuracy in modeling the required digital logic circuit. If you are passionate about Verilog and love c...

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    ...achieving a specific task. I already have a code for core RISC-V in system Verilog and need help running it in my Linux based virtual machine. The final objective includes enabling a basic load counter and comprehending the code thoroughly. need to create a presentation for my Verilog project. For the first task, I need to count the number of instructions entering the pipeline after a mispredicted branch, which is important for security. I need to run a test code to measure performance and count the flushed instructions. Can you help with this in Verilog? We can work together on it and complete the presentation.? To achieve the listed tasks, the freelancer should possess: - Expert knowledge and experience in working with Verilog, - Proficiency in executi...

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    I have a design that works with an Intel SoC, but I want a version using Efinix FPGA. It involves - FPGA providing control and timing pulses to the image sensor - LVDS data lines between the image sensor and the FPGA - DDR memory attached to the FPGA - a connection from FPGA to FT601 to make a USB3.0 connection (I know there are other ways to get the FPGA to make USB3.0 directly, but there's a reason why we want to use FT601 chip). This is the image sensor I think this FPGA would be suitable, but proposals can be discussed.

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    I have a design that works with an Intel SoC, but I want a version using Efinix FPGA. It involves - FPGA providing control and timing pulses to the image sensor - LVDS data lines between the image sensor and the FPGA - DDR memory attached to the FPGA - a connection from FPGA to FT601 to make a USB3.0 connection (I know there are other ways to get the FPGA to make USB3.0 directly, but there's a reason why we want to use FT601 chip). This is the image sensor I think this FPGA would be suitable, but proposals can be discussed.

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    I have a design that works with an Intel SoC, but I want a version using Efinix FPGA. It involves - FPGA providing control and timing pulses to the image sensor - LVDS data lines between the image sensor and the FPGA - DDR memory attached to the FPGA - a connection from FPGA to FT601 to make a USB3.0 connection (I know there are other ways to get the FPGA to make USB3.0 directly, but there's a reason why we want to use FT601 chip). This is the image sensor I think this FPGA would be suitable, but proposals can be discussed.

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    I am looking for a skilled professional who will help to develop a facial detection system using the Viola Jones algorithm optimized on a FPGA. This project will include implementation of hardware acceleration to enhance real-time facial detection. The Skills and Experience Required: - Strong proficiency in C++ programming - Extensive experience with FPGA, specifically with the Digilent Nexys A7 model - In-depth knowledge of the Viola Jones algorithm - Prior experience in real-time facial detection projects

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    I am seeking a proficient electronic engineer with an in-depth understanding of VHDL (high level logic design) it's related to xlinx and vivado

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    In this project we will be implementing a control system using the Lattice iCE FPGA. The task at hand involves converting a schematic for a Synchronous Data Link Control (SDLC) data stream to an SPI Master data stream converter to Verilog or VHDL and then verifying the design through simulation. And finally creating the file that will be used to program the target part in production. The ideal freelancer for this job is proficient in working with FPGAs, preferably with a strong background in the Lattice iCE FPGA. I’m looking for someone adept in schematic to HDL conversion. Experience in working with SDLC data will serve as a plus. Please ensure that your experience and skills include: - FPGA development, specifically with the Lattice iCE. - Ex...

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    Review VHDL Code S-a încheiat left

    We've written some VHDL code for FPGA we need someone to adapt it to our coding standard. we will share a report of all violations for a set of files and the VHDL code shall be modified as specified in the coding standard. To make an example all signals shall be names s_<signal_name>, signal test_sig : std_logic; -- violation! signal s_test_sig : std_logic; -- correct the code will be shared with a Gitlab repo, a dedicatd branch will be created to modify the original code. the code shall be compiled, to chekc no errors were introduced. as soon as the code is delivered we wil rerun the checker to chek for residual errors, and we would provide a feedback (unless the freelancer has the same checker tool)

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    I'm currently in search of an expert in electronics, Specifically FPGA's and Verilog who can assist in creating a 32 channel logic analyzer. The analyzer's primary role will be to facilitate the debugging of digital circuits, analyzing serial communications, and examining micro-controller signals and digital protocols. Key Responsibilities: - Design and create an analyzer able to decipher multiple digital protocols including CAN, SPI, I2C, UART, RS422, RS485, i2C 1-Wire, and SIM devices. - Equip the analyzer with a unique functionality to understand and interpret data in custom HEX, Bianry and ASCII formats. Ideal Experience and Skills: - Proficient in digital protocols and encoding. - Extensive experience in electronics, especially in creating and debugging logic ...

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    Its about vintage videogames I have a project that make emulation of cartridges. Each original Cartridge have circuits with ASIC customs called " mappers ". Theses mappers circuits are not available for sale, because was made in 90 years. Some hackers rebuild functionality of Asics throught verilog, and implemented in a single cartdridge with ALL mappers inside. In Github are The opensource project , and ALL mappers writed in verilog are available separated. My Idea is take one a one mapper and generate a output file and burn in individual hardware , like Xillinks XC9572 or XC95144 because The original project use hard weight hardware,like a

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    I'm seeking an experienced Simulink HDL coder to assist with a project focused on generating and optimizing HDL c...Simulink models. The models primarily consist of mixed-signal systems such as memory array and ADC, so previous experience working with these is crucial. The objective is to target this code to Field Programmable Gate Arrays. Ideal Skills and Experience: • Extensive experience with Simulink HDL coder • Understands how to optimize HDL code • Previous work with mixed-signal systems • Experience with FPGA and ASIC implementation This is an excellent opportunity for an experienced coder who is familiar with Simulink Model and has a solid understanding of HDL code and mixed-signal systems. Your expertise in these areas will greatly contribute to ...

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    I'm actively seeking a dedicated and experienced FPGA Programmer to assist with the tasks of designing the logic and writing the code for my project. Responsibilities: • Logic Design: Responsibility to design the logic that meets the project requirements. You should be able to effectively create a practical and efficient design. • Code Writing: You will write the code for the logic design. Your code writing should be clean, optimized and easy to understand. Project Requirements: • Performance and size constraints are significant factors in this project. Your design and code should focus on maximizing performance while considering the size limitations. • Functionality: The project involves data processing and signal processing. Experience and understa...

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    Hi, I need someone really experienced in FPGA, DSP, and specifically IFF signlas. I need to create an algorithim to detecet different modes of IFF signals and classify them. then display the data of the signals. I will aslo need someone to finalize the verilog code, help me with testing, debugging of my project, it will be a long time agreement not just a task to be done. I am hoping to collaborate with a diligent engineer who accurately interprets given instructions and is capable of delivering quality work. I am looking forward to your proposals.

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    I need someone proficient in FPGA programming and matrix manipulations to develop a solution that involves multiplying two-dimensional matrices on PYNQ Boards. The project's objectives include: • Computing processes for small-sized matrices • Ability to handle medium-sized matrices • Building the necessary verilog code and TB to facilitate and optimize the matrix multiplication on the PYNQ boards Here are the critical skills and experience needed for the job: • Familiarity with PYNQ FPGA programming • Experience working with PYNQ Boards • Deep understanding of matrix operations • Proficient in hardware description language (VerilogSV)

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    Bundle of 4 entry level Logic Design outputs --->Verilog , 4-bit wide 2:1 MUX ,Mealy machine , and a little more

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