Vhdlproiecte

Crearea unui aparat de cafea in VHDL(rulabil in programul Vivado) intr-un limbaj cat mai simplist indeplinind cerintele din documentul atasat.

Este un proiect pentru facultate. Termenul este 17 mai 2021. Cerința detaliată a proiectului este în imagine. Mi-ar trebui documentația care să cuprindă cutia neagră a circuitului, descompunerea în Unitate de control și Unitate de Execuție, o listă cu resursele pe care le voi volosi (ex: generator de numere aleatoare), organigrama, implementare in VHDL și o schema logică pentru că prezentarea proiectului trebuie făcută în Logisim, în care nu putem folosi decât componente de bază. Trebuie să folosim afișorul cu 7 segmente, butoane și switch-uri. La finalul documentației ar trebui să fie și Justificarea soluției alese, Manual de utilizare și întreținere, dar și Posibilități de dezvoltare ulterioară.

fpga/ultra and xilinx wiznet vhdl/verilog

FPGA, VHDL , Vivado , verilog,

Trebuie sa programez o placa Spartan-3 Board sa afiseze o imagine pe un LCD ( 2.4 LCD cu driverul de ILI9341) . Imaginea va fi primita pe seriala de RS-232 si transmisa pe LCD , dupa ce LCD-ul a fost initializat . Pana acum am implementat core-ul de SPI ( protocolul prin care comunica placa cu LCD-ul ) , core-ul de seriala ( la care vine atasat un buffer pt a putea verifica aparitia datelor pe seriala si a prelua datele) si s-a creat un bloc de control ( in fapt este o masina de stari) care initializeaza LCD-ul (si am putut "desena"(hard-coded) un dreptunghi colorat pe LCD). Ceea ce am nevoie este ca imaginea trimisa pe seriala sa fie afisata pe LCD ( incercari esuate din partea mea ).

Intr-un proiect VHDL sa se realizeze un simulator de memorie CACHE (cu mai multe politici de scriere si citire) care sa poata fi testat pe FPGA. Pretul si durata proiectului sunt orientative.

Intr-un proiect VHDL sa se realizeze un simulator de memorie CACHE (cu mai multe politici de scriere si citire) care sa poata fi testat pe FPGA. Pretul si durata proiectului sunt orientative.

I'm looking for a developer to create a system for my Zybo Z7 board that can detect people in real-time through a connected pcam5c camera and display the detection text on the ...Real-time Video Streaming: The video feed should be streamed in real-time. - Text Overlay: The detection results should be displayed as a text overlay on the video. Skills/Experience Required: - Proficient in Xilinx SDK and Xilinx Vivado. - Strong background in object detection, particularly with people. - Previous experience with video processing and streaming. - Knowledge of FPGA programming and VHDL/Verilog is a plus. Please note that my budget for this project is $60. I'm open to hearing from freelancers who can deliver within this budget. I have worked on single pixel (multipixel zoom.v i...

Hi ExpertSoul, I noticed your profile and would like to offer you my project. We can discuss any details over chat.

I am looking to integrate two ultrasonic sensors onto a Nexys A7 FPGA board using VHDL. My primary goal is using these sensors for object tracking and distance measurement. Integrate TWO HCSR-04 ultrasonic sensors to an Nexys A7 fpga board so that I can read data from both sensors. I need for the seven-segment display that is on the board to show the distances measured. Using a pushbutton on the board, have the display change to show readings from sensor 1 and when pushed the display shows readings from sensor 2 and vice versa. So basically, the pushbutton toggles which sensor's measurement is displayed on the seven segment display. Also, another push button will be used to toggle back and forth between displaying the distance in centimeters (cm) or inches (in) for both sensor...

I am looking to integrate two ultrasonic sensors onto a Nexys A7 FPGA board using VHDL. My primary goal is using these sensors for object tracking and distance measurement. Integrate TWO HCSR-04 ultrasonic sensors to an Nexys A7 fpga board so that I can read data from both sensors. I need for the seven-segment display that is on the board to show the distances measured. Using a pushbutton on the board, have the display change to show readings from sensor 1 and when pushed the display shows readings from sensor 2 and vice versa. So basically, the pushbutton toggles which sensor's measurement is displayed on the seven segment display. Also, another push button will be used to toggle back and forth between displaying the distance in centimeters (cm) or inches (in) for both sensor...

I'm seeking a proficient VHDL engineer to assist in the development of digital signal processing on a Basys Board 3, requiring knowledge in digital and analog inputs and outputs. The specifics of the digital signal processing algorithm are unclear at this stage due to omitted information. Key skills and experience needed: - Proficiency with VHDL and Basys Board 3 - Sound understanding of both analog and digital inputs and outputs - Aptitude for problem-solving and working with incomplete details - Prior experience in digital signal processing is advantageous.

I'm seeking an experienced and detail-oriented developer to create a Custome PCILeech firmware for SCREAMER PCIE SQUIRREL direct access memory card utilizing the 7 Series FPGA 35t chip. Firmware must...Squirrel. Firmware must bypass and avoid anti-cheat detection on EAC/BE etc. Responsibilities: - Develop firmware for PCILeech FPGA - Debugging and problem-solving throughout firmware development Skills & Experience: - Strong experience in FPGA programming and firmware development - Excellent debugging and problem-solving skills - Experience with high-speed data transmission - Proficiency with VHDL/Verilog languages The timeline for project completion is flexible, indicating a strong emphasis on quality over speed. However, I am eager to commence with the right candidate a...

Completing an intermediate-level circuit simulation is on the top of my agenda, and time is of the essence. Key Requirements: - Generate a simulation circuit using either Verilog or VHDL. - The complexity level should be intermediate, meaning that it should include components such as adders, decoders, and multiplexers. Ideal Candidate: An experienced freelancer with a strong background in circuitry and simulation languages such as Verilog or VHDL. Quick response and comprehension of task requirements are paramount due to the urgency of the project. Remember, the successful completion of this project is deemed urgent. Therefore, a prompt response and start are appreciated.

I am seeking a proficient electronic engineer with an in-depth understanding of VHDL (high level logic design) it's related to xlinx and vivado

In this project we will be implementing a control system using the Lattice iCE FPGA. The task at hand involves converting a schematic for a Synchronous Data Link Control (SDLC) data stream to an SPI Master data stream converter to Verilog or VHDL and then verifying the design through simulation. And finally creating the file that will be used to program the target part in production. The ideal freelancer for this job is proficient in working with FPGAs, preferably with a strong background in the Lattice iCE FPGA. I’m looking for someone adept in schematic to HDL conversion. Experience in working with SDLC data will serve as a plus. Please ensure that your experience and skills include: - FPGA development, specifically with the Lattice iCE. - Expertise in schematic to HDL ...

We've written some VHDL code for FPGA we need someone to adapt it to our coding standard. we will share a report of all violations for a set of files and the VHDL code shall be modified as specified in the coding standard. To make an example all signals shall be names s_<signal_name>, signal test_sig : std_logic; -- violation! signal s_test_sig : std_logic; -- correct the code will be shared with a Gitlab repo, a dedicatd branch will be created to modify the original code. the code shall be compiled, to chekc no errors were introduced. as soon as the code is delivered we wil rerun the checker to chek for residual errors, and we would provide a feedback (unless the freelancer has the same checker tool)

We have an existing VHDL project that implements various memory protocols that runs on a Lattice FPGA (MachXO2 LCMXO2-4000HC). The FPGA is used as a high-speed data bridge between an ARM based microcontroller and a connected memory device (using SMC). This project is to expand the existing project and add support for the eMMC protocol and eMMC Flash memory devices. For testing, we have acquired various 64GB devices that are available on Mouser and DigiKey. Basic functionality is required: reading/writing/erasing with legacy speeds and 1,4,8-bit data bus. Project can be extended to include additional modes / features. The project is in Lattice Diamond, and written in VHDL. All work must be done to the existing project. And tested using exported bitstream binaries. Note: if ...

We have an existing VHDL project that implements various memory protocols that runs on a Lattice FPGA (MachXO2 LCMXO2-4000HC). The FPGA is used as a high-speed data bridge between an ARM based microcontroller and a connected memory device (using SMC). This project is to expand the existing project and add support for the eMMC protocol and eMMC Flash memory devices. For testing, we have acquired various 64GB devices that are available on Mouser and DigiKey. Basic functionality is required: reading/writing/erasing with legacy speeds and 1,4,8-bit data bus. Project can be extended to include additional modes / features. The project is in Lattice Diamond, and written in VHDL. All work must be done to the existing project. Note: if you want to make a bid, please respond with yo...

...specifications and performance targets for the graphics card, considering factors such as core count, memory bandwidth, and power efficiency. Designing and modeling the GPU architecture using computer-aided design (CAD) software, incorporating advanced features for rendering, compute, and artificial intelligence. Implementing the design using hardware description languages (HDLs) such as Verilog or VHDL, and simulating the functionality using specialized tools. Conducting rigorous testing, validation, and optimization to ensure the graphics card meets performance, reliability, and compatibility standards. Iterating on the design based on feedback, performance analysis, and emerging technologies. **Power Efficiency:** - My priority is an energy-saving design. The challenge lies i...

...this project. - Familiarity with high-speed interface protocols and their integration into FPGA designs. **Ideal Skills and Experience:** - Strong background in electrical engineering or computer science, with a focus on hardware design. - Prior projects or experience in FPGA-based design, especially those involving DSP or video processing. - Proficient in C/C++ for algorithm development and HDL (VHDL/Verilog) for hardware description. - Knowledge of optimization techniques for power efficiency and performance maximization in FPGA designs. - Ability to work with simulation tools and perform thorough validation and testing of the designed hardware. My project calls for an innovative and technically skilled freelancer who can navigate the complexities of advanced FPGA design. If ...

...FPGA-based game similar to a classic crossing road game with a twist. Required Skills: - Proficient in VHDL programming - Experience with FPGA design and implementation - Familiar with character movement logic - Ability to implement a scoring system into FPGA projects Project Requirements: - Design VHDL code specifically for an FPGA target device - Develop code that allows character movement within the game - Create a scoring system to track and display the player's score -able to score to reach a target and gameover point -able to control the game using fpga or keyboard - able to connect via vga Ideal Candidate: - You should have a portfolio demonstrating previous work with FPGAs and VHDL. - Experience in game development or simulation is highly desirable...

...freelancer to implement an intermediate System on Chip (SoC) module using VHDL for an FPGA-based system. Key Responsibilities: - Develop and simulate VHDL code for an FPGA-based SoC module. - Ensure code meets functionality and performance requirements. - Provide documentation and support for testing and integration. Ideal Skills: - Proficient in VHDL programming. - Experience with FPGA design and implementation. - Familiar with SoC architecture and digital design principles. - Ability to write clean, optimized, and well-documented code. Qualifications: - Previous projects involving VHDL and FPGAs. - Understanding of intermediate SoC modules. - Good problem-solving and communication skills. Project Deliverables: - Working VHDL code as per specifica...

I am looking for an expert in FPGA design who can help create a SmartFusion2 design with specific features. the designer shall be able to - update VHDL design to control other peripherals integrating in the current design - update the SW on the ARM Ideally, the testing function should use predefined test cases. The main focus of the testing system needs to be hardware testing. Therefore, essential skills and experience include knowledge of hardware testing techniques and familiarity with FPGA configuration, power management, and communication protocols.

I'm looking for an experienced VHDL developer to create a traffic-themed crossing road game for FPGA, with a keen eye for detail and efficiency in design. Key Responsibilities: - Design and implement a VHDL-based FPGA system - Program player movement controls and responsive gameplay - Develop dynamic obstacle generation mechanics Skills Required: - Proficient in VHDL and FPGA programming - Strong understanding of digital design and signal processing - Experience in gaming or simulation projects preferred The successful freelancer must showcase previous FPGA projects, ideally with gaming applications. Please provide code samples or portfolio links with your proposal.

I'm seeking a talented individual with a strong background in VHDL and FPGA design, specifically with Altera products, who can successfully implement communication interfaces within my project. The ideal candidate will possess a deep understanding of UART protocol and be capable of integrating it with other interfaces. Requirements: - Proficiency in VHDL programming for FPGA - Experience with Altera FPGA design tools - Successful implementation of UART interfaces - Knowledge in LAN and USB communication The scope of the project includes: - Implementing a low-speed UART interface (up to 115200 bps) - Integrating UART with LAN and USB interfaces on the FPGA The right freelancer will have a strong portfolio demonstrating their expertise in FPGA interface design and commu...

...4x4 matrix and 2x2 kernel convolution. - Employ kogge stone adder for efficiency. - Integrate vedic multiplier for rapid multiplication. - Ensure system operates with integer value precision. - Target design is for an FPGA using Verilog or VHDL. **Ideal Skills** - Proficiency in FPGA programming. - Strong background in digital arithmetic circuits. - Experience with kogge stone adders and vedic multipliers. - Knowledge of image processing techniques. - Use of Shifting , multiplication and addition in performing 2d convolution - Fluent in Verilog or VHDL coding. - Ability to optimize for power, area, and speed. **Project Deliverables** - Optimized HDL code for the convolution system. - Synthesis and simulation results demonstrating performance. - Documentation outlining de...

We have an existing VHDL project that implements various memory protocols that runs on a Lattice FPGA (MachXO2). The FPGA is used as a high-speed data bridge between an ARM based microcontroller and a memory device. This project is to expand that to add eMMC support, such as typical 64GB eMMC 5.1 devices available on Digikey/Mouser. Basic functionality is required: reading/writing/erasing with legacy speeds and 1,4,8 bit data bus. Project can be extended to include additional modes / features. Note: if you want to make a bid, please respond with your previous experience with working with eMMC devices.

...consectutively per key No more then 6 number consectutively per key The private keys in the hashtable cant have any of these values in them . This will drastically reduce the scan space Skills and Experience: - Advanced level of familiarity with FPGA and bitstream development - Strong understanding of FPGA architecture and programming languages - Proficiency in programming languages such as VHDL or Verilog - Experience in designing and implementing complex FPGA systems - Knowledge of hardware design principles and methodologies Project Requirements: - Develop a Kangaroo Pollard FPGA Bitstream for personal use - Create an operating application with specific features based on my requirements - Integrate the bitstream and operating application to work seamlessly together - Pro...

i am looking for an individual who can do perform the project on Quartus in VHDL formate. We are looking for only experts.

I am looking for a skilled software developer to create a...that connects FPGA cards for my temperature measurement equipment. This role involves designing a program that is compatible with the Windows operating system. To develop the connection effectively, a solid knowledge of VHDL, Spartan 3 boards and C++ programming will be required. The ideal developer should be comfortable working with a basic command line interface. The main focus is on functionality, not graphic aesthetics. To be successful, both the functionality and security of the program must be prioritized. Key essentials for the job include: - Deep knowledge of VHDL - Knowledge of Spartan 3 card. - Know C++ programming. - Experience with command line interfaces. - Ability to ensure security and error checkin...

I am looking to hire an individual who really understand this subject. should be able to solve any problems related to this subject. communicate and be able to write good programming and simulation designs.

Design a TImestamp generator from PPS and a NMEA parser in VHDL

I am looking for a programmer to help me with my project. Programming Language: VHDL Timeframe: ASAP Skills and Experience: - Proficiency in VHDL programming language - Experience in developing and implementing VHDL designs - Familiarity with FPGA programming - Strong problem-solving skills and attention to detail - Ability to work efficiently and meet tight deadlines Project Details: - The project involves developing and implementing VHDL designs for a specific application. - The programmer will be responsible for coding, testing, and debugging the designs. - The project needs to be completed as soon as possible, so the ability to work quickly and efficiently is crucial. If you have experience in VHDL programming and are available to start immediat...

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Description: Create a Hardware-Software Codesign version of the k-mean clustering algorithm K-means clustering is a popular data mining algorithm that partitions n samples into k clusters (note: the k-nearest neighbor classifier algorithm used in machine learning can leverage the cluster centers produced by the k-means clustering algori...algorithms have been developed that quickly converge to a local optimum solution. We will consider one of those algorithms in this project. I have provided a C code version of the k-means clustering algorithm, and a Vivado block diagram and memory layout (explained below) that you will use as a starting point. You will need to study the C version and then decide which components to implement as a VHDL module using the BRAM (you also used BRAM in HI...

need to implement neural networks in vhdl. More details will be shared in discussions

using Artix 7 implement Master UFS protocol design for the UFS Host device, Feel free to contact who's have experince on Stroage's(emmc, ufs, nand e.t.c) Skills required : Verilog , VHDL , C

I'm looking for a Freelancer to help me find out VHDL code for designing crossy road game. I already have a detailed plan that I'd like to have implemented, so I need someone who can understand what I'm looking for and execute the plan quickly and accurately. This is a micro project ,so I need someone who is willing to help me to get a vhdl designing code for crossy road game. If you think you have the expertise to handle a project like this, please reach out to me and let me know how you can help. Thank you for your time and consideration.

I am seeking assistance with designing both an ALU and memory modules for my project. I require help with both coding and design aspects. Specific tasks for this project include: - Designing ...assistance with designing both an ALU and memory modules for my project. I require help with both coding and design aspects. Specific tasks for this project include: - Designing an ALU - Designing memory modules Ideal skills and experience for this job include: - Proficiency in VHDL programming language - Strong knowledge and understanding of ALU and memory module design - Experience in both coding and design aspects of similar projects If you have experience in designing ALU and memory modules and are proficient in VHDL programming language, I would like to discuss this project ...

I am in need of an intermediate FPGA VHDL designer who can assist me with designing a small module. This project requires someone with experience and expertise in VHDL programming for FPGAs. Skills and Experience: - Proficiency in VHDL programming for FPGAs - Experience with designing small modules - Strong understanding of FPGA architecture and design principles The project has a tight deadline, with completion expected within the next 1-2 weeks. Therefore, it is important for the freelancer to be able to work efficiently and deliver high-quality work within this timeframe. If you have the necessary skills and experience in FPGA VHDL design, and are able to meet the project requirements within the specified timeframe, I encourage you to apply for this proj...

design of a VHDL synthesizable module to implement data exchange between firmware and software on a KRIA SOM module

For this project, am looking to create a system design for the game Beer-Pong using a combination of BASYS 3 and additional components compatible with BASYS 3 and VHDL. I want the system design to have a basic level of complexity with a specified deadline of 3 weeks for completion. Different components like switches, LEDs and sensors. The aim of this project is to design a system for the game Beer-Pong using BASYS 3 and components that are compatible with BASYS 3. In this project, we will be able to play advanced beer- pong. Our setup will consist of 6 cups in total, and the aim is to throw three balls out of 5 into adjacent 3 cups Balls must perform a straight line). Thus, at that point, our game differs from the classical game. Positions of the cups can be adjusted since the playe...

...assist me with an Axi Ethernet 1G base project for Xilinx KCU116, which is a Kintex Ultrascale. Project MUST NOT CONTAIN Microblaze, only soldi VHDL code. Target Device: Target device is Kintex Ultrascale+, as KCU116 board will be the target device for the project. Intended Functionality: The main objective of this project is to develop a networking solution using Ethernet. The freelancer should be experienced in VHDL developments and in networking functionalities for Xilinx KCU116. Specific Requirements: - 1/2.5GB Axi Ethernet Core (not provided, but free trial is available by Xilinx) based - 1Gb speed required - No Microblaze or MPSoC, only VHDL code. - Configuration must be done by AXI-Lite bus (No Configuration vector) - Ethernet frames must be sent by AXI-St...

For this project, I am looking to create a system design for the game Beer-Pong using a combination of BASYS 3 and additional components compatible with BASYS 3 and VHDL. I want the system design to have a basic level of complexity with a specified deadline of 3 weeks for completion. Different components like switches, LEDs and sensors. The aim of this project is to design a system for the game Beer-Pong using BASYS 3 and components that are compatible with BASYS 3. In this project, we will be able to play advanced beer- pong. Our setup will consist of 6 cups in total, and the aim is to throw three balls out of 5 into adjacent 3 cups ( Balls must perform a straight line). Thus, at that point, our game differs from the classical game. Positions of the cups can be adjusted since...

Create a simple yet effective Smart Home Energy Monitor using your expertise in electrical engineering and FPGA/VHDL. This project aims to help working individuals monitor and optimize their home energy consumption. It can be both fun and practical.

We are currectly looking for support to write a simple motor model in VHDL, that will be used to test our motor controller in FPGA. The motor model shall be as simple as possible and an equivalent Matlab/Octave/Python/C/C++ model would be desiderable and used to validate the VHDL model

requiring the design of a VHDL synthesizable module to interface an incremental encoder. This is generic ABZ quadrature decoder, some code woulc also be found on the net already, that requires integration and testing () The encoder is the Z is for homing (it marks the zero position of the encoder) specs and deliverables in the attached document

I am in need of an expert with FPGA Verilog/VHDL experience in Xilinx. The project requires advanced programming skills in Verilog/VHDL and must be completed within a week. You should have a Xilinx board to work on this project. Tasks: - Programming in Verilog/VHDL Ideal Skills and Experience: - Expertise in FPGA Verilog/VHDL - Strong knowledge of Xilinx - Advanced programming skills in Verilog/VHDL Deadline: - Within a week

I am looking for experts in Xilinx VHDL to be a part of my team and work with me on various projects. I need dedicated experts who can work in tight deadlines too I would encourage new freelancers too to place bid and have a communication with me