Închis

Project for rohi1710rohi1710

4 freelanceri licitează în medie 14$ pentru acest proiect

rohi1710rohi1710

Hired by the Employer

%bids___i_sum_sub_35%%project_currencyDetails_sign_sub_36% USD în 3 zile
(4 recenzii)
4.5
ssi57e814d4beaeb

Writing Verilog HDL codes which can be synthesised is what I do everyday, so give me the opportunity to write verilog codes for complex functions which can be easily synthesised on an FPGA board.

%bids___i_sum_sub_32%%project_currencyDetails_sign_sub_33% USD în 1 zi
(0 recenzii)
0.0
%bids___i_sum_sub_32%%project_currencyDetails_sign_sub_33% USD în 1 zi
(0 recenzii)
0.0
tulikaranjansmit

I am Tulika Ranjan [login to view URL] in VLSI Design from NIT-Surathkal. I have been involved in an internship at NAL and LRDE (DRDO). Presently working with HCL Technologies Ltd. having 2+ years of experience. I am very profess Mai multe

%bids___i_sum_sub_35%%project_currencyDetails_sign_sub_36% USD în 5 zile
(0 recenzii)
0.0