Design of a Deep and Superscalar MIPS Processor Pipeline
$250-750 USD
S-au achitat serviciile după ce au fost prestate
I'm looking for someone to design a deep and superscalar MIPS processor pipeline for my graduation project. The goal of this project is to design a deep and superscalar MIPS pipeline. The design will be tested and verified using appropriate hardware description language (HDL) platform. Students would investigate different design alternatives before picking their solution for implementation. Designing a deep and superscalar pipeline involves not only increasing the number of pipeline stages, known as superpipelining, but also increasing the number of instructions issued concurrently. Thus, the dual objective of increasing the number of instructions running simultaneously at each clock cycle as well as reducing the average number of clock cycles per instruction (CPI) to be effectively less than one can be possibly realized. Combining a deep and superscalar pipeline would entail design changes to different components of the processor datapath, such as the ALU as well as the forwarding and control units. Simulation shall be used to test the implemented design using test programs containing both data and control dependencies.
ID Proiect: #36709017
Detalii despre proiect
Acordat lui:
Dear sir I have more than 10 years experience in computer architecture and hdl design and i can design the superscale mips in vhdl or verilog
17 freelanceri licitează în medie 554$ pentru acest proiect
Dear customer, I am really happy to help you this project. I would like to introduce that I am an freelancer with 10 years experience in FPGA/VHDL/Verilog and C/C++. There is some of my project I finish: - CPU MIPS Mai multe
Hello there! My name is Hassan, and I'm excited to tell you about my project proposal for designing a deep and superscalar MIPS processor pipeline for your project. With over 15 years of experience in engineering, arti Mai multe
We are a team of Electrical and Electronics engineers, we have successfully completed 1000+ Projects for multiple regular clients from OMAN, UK, USA, Australia, Canada, France, Germany, Lebanon and many other countries Mai multe
Expertise in RISC-V/MIPS: With years of experience in computer architecture and a deep understanding of RISC-V and MIPS instruction sets, I have the knowledge and skills necessary to engineer efficient and reliable pro Mai multe
Dear Client, We at N&T Negocios y Tecnologias s.r.l. would like to express our interest in your project concerning the design of a deep and superscalar MIPS processor pipeline. As a company with 20 years of experience Mai multe
Hi I am a hardware expert and having experience in designing MIPS and RISC processors. MIPS processor is pipelined to increase the speed of processor and its throughput is increased when CPI is increased. In both con Mai multe
Hi, I have been working on Verilog/VHDL, Xilinx/Altera/Lattice/Microsemi FPGA and tools by more than 9 years. I have already worked with MIPS with 5 pipeline stages. We can discuss more on your project and start work Mai multe
High employer! I will design your deep and superscalar MIPS processor pipeline for your project. I have a deep understanding of Electronics, Microcontroller and HVDL. I will deliver quality work with a quick turnaround Mai multe
Hi, I have read the details and I am sure that I will do the task Please message me for more discussion. And will proceed with the project.
Hello Abdulmohsen79, We would like to grab this opportunity and will work till you get 100% satisfied with our work. I can work full time for you and your project. I can start work immediately. I am an expert de Mai multe
Hello there, I am delighted to offer my services for the design of a deep and superscalar MIPS processor pipeline, which is an integral part of your graduation project. I have reviewed your needs and believe I possess Mai multe
I have done this before for my own computer architecture module, implementing a standard 5-stage pipeline in Verilog is what I would be proposing as the base-case. From there if time permits we can add even more improv Mai multe
Hi, Skill Set (Experience 30+) Verification methodologies - VMM, UVM, OVM & verification IPs, Verilog, VHDL, System Verilog, Model development in C, C++, System Verilog, FPGA, Architecture of x86, microcontrollers, ARM Mai multe
