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FPGA Design in VHDL

$5000-10000 USD

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Data postării: circa 6 ani în urmă

$5000-10000 USD

Plata la predare
Design of FPGA to serve as a memory mapped resource for a local processor module. The processor interface is a memory mapped address/data bus. The FPGA design contains registers, counters and data path functions. System clock frequency is 25MHz. No internal processor is used within the FPGA. An external SRAM is required for expanded data storage. The target FPGA is the Microsemi ProASIC3E.
ID-ul proiectului: 15989868

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7 propuneri
Proiect la distanță
Activ: 6 ani în urmă

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7 freelanceri plasează o ofertă medie de $6.674 USD pentru proiect
Avatarul utilizatorului
Dear sir I have more than 10 years experience in digital design using FPGA and VHDL, please check my profile also please message me so that we can discuss Best regards
$5.555 USD în 10 zile
4,9 (390 recenzii)
7,8
7,8
Avatarul utilizatorului
Dear customer, I am really happy to help you out of this project. I would like to introduce that I am an freelancer with 100% JOB COMPLETED in VHDL/VERILOG. I am really suitable for job description: First: I am an Electronics engineer who is very expertise with VHDL/Verilog. In fact, I have done so many project of VHDL/Verilog(Karatsuba multiplier, Nintendo design, encryption algorithm like Sax Hash, Bernstein Hash, HummingBird...Also, I participated in a Walker Recognition project(data from Camera to Human Detection(image processing-HOG feature and Adaboost) and display in VGA). Besides,,I implemented the image conpression (wavelet transform). Aslo, I have experience in coding Booth multiplier and very familiar with Xilinx tools like ISE. and Vivado. Therefore, I can simulation the projecthe in behavior, post-syntheize... with free hesitation. I am also have experience of freelancer here: https://www.freelancer.com/u/ducdctoandh.html Also, I am very good in English (IELTS 6.0) and I have several year of researching so I can fully understand your requirement and understand fully about the papers and write the academic report. Please contact me and let me know if you want any special requirement and do with lower price. Thank you.
$5.000 USD în 10 zile
4,9 (84 recenzii)
6,4
6,4
Avatarul utilizatorului
A proposal has not yet been provided
$5.000 USD în 30 zile
4,7 (12 recenzii)
4,5
4,5
Avatarul utilizatorului
Hi, my name is Zeeshan. I would love the opportunity to assist you in designing memory mapping with the local processor. I have read your requirements and understand well. I have complete BS Electrical Engineering and currently enroled in MS EE. I have more than 3-years of experience in FPGA and VHDL. If you want to know more about my skills or expertise, please feel free to message me. Thank you Best Regards Zeeshan
$6.111 USD în 30 zile
4,2 (1 recenzie)
1,9
1,9
Avatarul utilizatorului
HI timc16, I have gone through your requirements for "FPGA Design in VHDL". Iam ready to do this for you. We are a team of experience designers and developers and as per requirements, we can provide you an amazing work. Relevant Skills and Experience I have 10+ years of experience in Design, Verilog / VHDL I can do this within your budget too $5000 - $10000 USD Let's have chat so i can explain you in deep. Thank you, Regards, Mmadi, Flowgica Technologies.
$7.000 USD în 36 zile
0,0 (0 recenzii)
0,0
0,0

Despre client

Steagul UNITED STATES
United States
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Membru din ian. 2, 2018

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