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Design Verification

3 freelanceri licitează în medie 170$ pentru acest proiect

hungfreelancer

I have 10 years of experience in design and verification using Verilog and SystemVerilog, VMM. Please message me. Best regards.

%bids___i_sum_sub_35%%project_currencyDetails_sign_sub_36% USD în 5 zile
(5 recenzii)
3.9
abubakarayyub01

Hello Dear Concern, We are a team of professional members of Electrical, Electronics, Mechanical, Civil, Chemical, Energy, Industrial Engineering. We are also expert in following softwares: MATLAB, Simulink, VHDL, PAD Mai multe

%bids___i_sum_sub_35%%project_currencyDetails_sign_sub_36% USD în 3 zile
(0 recenzii)
0.0
FSEVE

Design/Verification Engineer with experience in large scale complex ICs development/Verification with practicing in Verilog, SystemVerilog, UVM and Programming Python with DUTs Verification. Let's Discuss further.

%bids___i_sum_sub_35%%project_currencyDetails_sign_sub_36% USD în 10 zile
(0 recenzii)
0.0