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### What this is I have three KiCad 10 boards for a telecom cabinet monitoring and access-control product. Schematic capture, part selection, footprints, placement, design rules, BOM and fabrication output are all finished. One board is fully routed. The other two have a short list of connections that two autorouters could not place, and I need an experienced layout engineer to close them by hand. This is **not** a "design my PCB" job. It is a well-defined finishing task on a board that is already DRC-clean, with every remaining connection documented and its obstacle identified. ### Current state, measured | Board | Size | Layers | DRC errors | Connections open | |---|---|---|---|---| | Base | 155 × 90 mm | 4 | 0 | 23 | | Cellular module | 80 × 85 mm | 4 | 0 | 0 — complete | | Battery module | 105 × 80 mm | 2 | 0 | 11 | The base board carries 196 components, 160 nets, 546 SMD pins, 2661 track segments and 358 vias. `[login to view URL]` is a solid, uncut ground plane and carries zero track segments; keeping it that way is a hard requirement (see constraints). ### Scope of work 1. Close the 23 open connections on the base board and the 11 on the battery module. 2. Finish with **zero error-severity DRC violations** on all three boards, using the project's own rules as supplied. No rule edits. 3. `[login to view URL]` still carrying zero track segments on the base board, verifiable with a one-line script I provide. 4. Every track at or above its net class width, verifiable with a script I provide. 5. A short written note for any connection you could not close, saying what you tried and what blocked it. A documented open connection is an acceptable deliverable; an undocumented one is not. If closing a connection genuinely requires moving a component, that is allowed for passives, with the move and the reason noted. A list of parts that must not move is in the handover pack. ### What makes the remaining connections hard I want you to see this before bidding, because it is the actual difficulty. - **12 are fine-pitch escapes.** The accelerometer `U7` has 0.15 mm between its own pads. `U14` is 0.25 mm, `U12`/`U13` 0.30 mm, `U1`/`U2` 0.35 mm. The board has generated per-part pin-escape rules permitting 0.13 mm clearance and a 0.20 mm width floor inside those footprints' courtyards, so the escapes are legal — they just need doing carefully. One connection runs between two pins of `U7` itself and may not be possible; say so if it is not. - **5 are in the 46–60 V input section**, in the `HV` net class at 0.40 mm track and 0.60 mm clearance (IPC-2221 Table 6-1, category B2, 51–100 V band). That needs 1.60 mm to pass between two things, in the most crowded part of the board. `/HV_SW` and `/HV_BST` are switching nodes and should be kept short and compact. - **6 are plain congestion** on relay-to-terminal and auxiliary-loop nets. These are ordinary work. - **9 of the battery module's 11** are escapes at the charger (`U1`, 0.20 mm pad gap) and the current monitor (`U3`, 0.15 mm). ### Hard constraints These are the ones that will get work rejected if ignored: - **Do not route on `[login to view URL]`.** It is the ground reference plane for every signal on `[login to view URL]` and the reason the board is four layers. KiCad cannot express this as a design rule, so DRC will not stop you — it is checked separately and it is checked. Stitching vias *to* the plane are fine and encouraged. - **Do not edit the design rules, net classes, or the `.kicad_dru`.** They are generated from measurements and from IPC-2221, and both the net class and the custom rule files are regenerated by scripts, so hand edits are lost anyway. - **Do not widen or narrow a track outside its class**, except the permitted neck-down inside a pin-escape courtyard. - **Do not move** the ESP32 module `U6` (its antenna keep-out currently hangs off the board edge), the 15 field-wiring terminals, the HV switching regulator group, or any decoupling capacitor sitting beside a supply pin. - **Open the project (`.kicad_pro`), not the bare `.kicad_pcb`.** The rules live beside the board. Opening the board alone gives you one default net class and no custom rules, and DRC will then report clean against rules that are not this board's. ### Required skills - KiCad 9 or 10 PCB editor, fluent. Interactive router, push-and-shove, layer management, DRC. - Real experience routing fine-pitch QFN and MSOP escapes at 0.15–0.35 mm pad gaps. - Comfortable reading a custom `.kicad_dru` with `intersectsCourtyard` conditions. - Git, at a basic level: clone, branch, commit, push. Work is handed back as commits on a branch, not as a zip of files. Nice to have: experience with 46–60 V telecom supply sections and creepage practice.
Project ID: 40742258
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15 freelancers are bidding on average $72 USD for this job

Hi, I have experience in designing Circuits and can complete your project. I have expertise in the following: 1- Designing schematic and PCBA 2- Ordering the PCBA and getting boards manufactured. 3- Writing firmware for the PCBA to make sure everything works as expected. 4- I can also develop smartphone apps to communicate and control the hardware. If you wish we can discuss in chat. Thank you.
$50 USD in 7 days
7.3
7.3

Hello I have 13 years experience in PCB designing I will complete routing I will do Zero DRC .I will deliver you source files Regards humza
$90 USD in 9 days
7.4
7.4

Hi there I'm an Electronic Engineer with over 10 years experience designing embedded applications and their PCBs, you can learn more about me from my Freelancer Profile. How about a private message so we discuss the details of your PCB edits. Kind regards V.T.
$150 USD in 3 days
6.7
6.7

I am an Embedded Systems and PCB Design Engineer with experience in Altium Designer, Kicad, Easyeda, Protious and custom hardware development. I can design your PCB from schematic to production-ready files, including: • Schematic Design • PCB Layout • Component Selection • Design Rule Check (DRC) • Gerber Generation • BOM Preparation • Manufacturing Support (JLCPCB, PCBWay, etc.) I have experience with ESP32, STM32, sensor interfaces, power supplies, RF modules, Ethernet, and industrial electronics. Please share the project requirements, schematic (if available), board dimensions, and any special requirements. I can start immediately. Looking forward to working with you
$350 USD in 12 days
5.0
5.0

Hi, Bojan here, from Serbia. Designing your KiCad PCB routing completion with three KiCad, 10 boards and 90 mm is doable; what matters most is a board that works on the first order and can be built at scale. I'm a senior embedded and electronics engineer with 8+ years of experience working with PCB Layout, Electrical Engineering and ESP32. With KiCad, the real challenge is part availability and manufacturability. A common issue: no DFM check before ordering, so boards come back with assembly or clearance problems. My plan: first, review the schematic, parts and enclosure limits. Then, update the layout with DFM, power paths and grounding in mind. Finally, run DRC and a DFM check, then prepare Gerbers and the BOM. I'd start with the core layout changes as phase one. I've done PCB work in ESP32. A few questions to better understand the scope: 1. Does the board need to pass EMC testing? Then grounding and the layer stack are planned for it from the start. 2. Add test points for the key signals? I'd recommend it, debugging and production testing get much faster. 3. Does it need CE or FCC certification? I plan layout and filtering with that test in mind. I can start right away. Happy to go over the details here in chat and suggest the best approach. Looking forward to hearing from you, Bojan
$50 USD in 1 day
4.1
4.1

Hello, I am Santosh Chaulagain, a professional Electrical Engineer and PCB Designer with over 7 years of experience in schematic design, PCB layout, and embedded systems, including ESP32, IoT devices, analog and digital circuits. I have successfully completed multiple projects for clients worldwide, delivering reliable and manufacturable designs. I have carefully reviewed your project requirements and I am confident that I can provide a high-quality solution tailored to your needs. My expertise includes PCB design using industry standards, component selection, BOM preparation, Gerber generation, and design optimization for cost and performance. I always ensure that my designs are fabrication-ready and tested for reliability. I focus on clear communication, timely delivery, and customer satisfaction. I am happy to discuss your project in detail and provide revisions until the final result meets your expectations. Looking forward to working with you. Best regards, Santosh C. Electrical Engineer | PCB Designer | ESP32 & IoT Specialist
$28 USD in 7 days
3.7
3.7

As a team of RF and Electronics Engineers specialized in high-frequency systems, microwave engineering, and advanced electronic design, we are well-equipped to handle the intricate nature of your KiCad PCB Routing Completion project. With over [X] years of experience under our belt, we've encountered and successfully resolved many challenging problems such as the fine-pitch escapes and dealing with high voltage inputs that you've outlined. Our firm commitment to meeting client specifications and delivering flawlessness aligns perfectly with your need for zero error-severity DRC violations. We comprehend not only the technological aspects but also the pragmatic considerations like working closely with current layouts to avoid unnecessary component relocation. Additionally, our skillset in using KiCad - one of the primary IME/EDA suite- makes us highly adaptable to project requirements. We take pride in our knack for combining theoretical knowledge with practical implementation and bringing optimization into real-world RF systems. Hence, we don't just provide service in circuit design, embedded systems or PCB layouts; we deliver holistic solutions that factor in every conceivable constraint for smaller scale applications such as telecom cabinet monitoring and access-control products like yours. If chosen for this project, rest-assured it will receive our undivided attention, meticulousness, and our determination to render nothing short of an excellent outcome
$30 USD in 7 days
2.5
2.5

Hi, I work in KiCad every day, so I can take this on as-is. I won't touch the design rules, the net classes or the .kicad_dru file, and I'll keep the ground layer free of track segments. For the fine-pitch escapes I'll work within the clearances your rules already set, and I'll give the 46-60V nets more room than the minimum rather than squeezing them. You get both boards back DRC-clean, plus a short note on anything I couldn't close and what I tried. How soon do you need them? Thanks
$25 USD in 4 days
0.0
0.0

Gujranwala, Pakistan
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