Design a serial communication protocol i.e., telegram containing data bus, address bus, read/write bus and checksum(CRC).
1. read/write access is to be transferred. If CPU is doing a write access, then it should have 1 byte address and 1 byte data and control bits if possible.
2. Read bus should read the address to be transferred.
3. The write bus should transfer the PSS signal or the chip select signal for the peripheral boards.
4. PSS is of 16 bits and the status of PSS signal should also be transferred.
5. The data should be on write access for front transfer and on read access for reverse transfer.
6. Define the type of telegram as read or write type.
7. Checksum should check if the data is valid or not.
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Hi there, I'm bidding on your project "VHDL expert needed" Being a professional electrical engineer, I can do this project for you. please leave a message on my chat so we can discuss the budget and deadline of the pr Mai multe
Hi! I am an Electronic engineer, PCB Layout, Circuit Design, microcontroller, STM32 microcontroller, C programming expert having past experiences with ,Altium, arduino, pic, AVR, chipkit and Texas instruments microcont Mai multe
Hello, I am digital design engineer with +5 years of experience in VHDL/Verilog. I have worked on a serial protocol which is similar to yours (has address bits, embeds synchronization bits and CRC16 bits to the stream, Mai multe
Hello.. I am holding masters degree in electrical engineering.. I have very good experience in vhdl and verilog.. I have gone through your requirements and I am sure that I can do this project perfectly.. Kindly drop m Mai multe
Hi, there I am a VHDL and FPGA expert, I can complete your project perfectly and provide live explanation. Contact me to discuss more